Junior FPGA Design Engineer (RO)

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Junior FPGA Design Engineer (RO)

Requirements

FPGA Xilinx Vivado or Intel Quartus Prime Matlab ModelSim Bachelor's or Master's degree in Electrical Engineering

Job description

Shape the Future of Satellite Communication!

Join our innovative team at the forefront of Satellite Communication as a Junior FPGA Design Engineer. In this role, you’ll be involved in creating groundbreaking solutions by programming FPGA devices for high-frequency mixers. If you’re passionate about Hardware Description Language (HDL) and thrive in a fast-paced environment, this is an exciting opportunity to make your mark.

 

Key Responsibilities

  • Collaborate with experienced professionals to develop and implement FPGA designs for high-frequency mixer devices, revolutionizing Satellite Communication applications.
  • Work closely with hardware engineers, software engineers, and system architects to shape requirements and design specifications that push the boundaries of technology.
  • Transform system-level requirements into meticulously crafted FPGA designs, documenting your creative design process.
  • Write and debug HDL code, ensuring compliance with industry standards and best practices.
  • Conduct thorough simulations and verifications to achieve functionality and optimized performance.
  • Embrace the challenge of hardware/software integration and participate in system-level testing to validate the exceptional capabilities of FPGA-based solutions.
  • Identify and resolve design issues, utilizing your troubleshooting skills to fine-tune FPGA designs for optimal performance, power efficiency, and resource utilization.

Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 1-2 years of hands-on experience in FPGA design and development
  • Solid understanding of FPGA design principles and experience with programming FPGAs using VHDL or Verilog languages.
  • Familiarity with high-frequency mixer devices or related applications in the field of Satellite Communication.
  • Knowledge of FPGA design tools such as Xilinx Vivado or Intel Quartus Prime.
  • Experience with simulation tools like ModelSim, Matlab, or Questa for functional verification.
  • Strong analytical and problem-solving skills, with the ability to identify and resolve design issues.
  • Passion for continuous learning and exploring emerging technologies in the field of FPGA engineering.

WHAT YOU GET

We support you at every stage

Check the benefits of working at Spyrosoft

flexible working hours

Flexible working hours

You're not an early bird? You can work for us when you are the most productive.

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Private health insurance

Keep your health in check with easy access to medical professionals.

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Hybrid work

Work from the comfort of your home or any of our amazing offices.

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Internal initiatives

Take part in our knowledge-sharing meetups organised by and for tech enthusiasts.

Recruitment process (run remotely but you're more than welcome to visit us at the office)

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01

We check your CV

We carefully read every CV we receive. If you meet our requirements, we call you to learn more about your skills and needs.
02

We check your qualifications

After talking on the phone, it's time for the technical part of recruitment, during which we can ask you to complete the task related to your position. We always provide feedback after this meeting.
03

We make an appointment

The next stage is a meeting in one of our offices or online. You will have the opportunity to learn more about the team and work culture from the person who manages the department and/or Spyrosoft partner.
04

You get the answer

At Spyrosoft, we contact every person who was taking part in recruitment process. If we accept your candidacy, we will also send you a list of the next steps.

Meet the recruiter

Claudia Lobonea Spyrosoft

It’s up to you to decide what your next step is. At Spyrosoft, you’ll have the chance to thrive and be yourself.

Claudia Lobonea

Recruitment Specialist

CONTACT OUR RECRUITMENT TEAM

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Junior FPGA Design Engineer (RO)

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